
Kotaro Hachiya
Faculty of Humanities and Social Sciences,Department of Business,Management Information Course | Professor |
Last Updated :2025/06/19
■Researcher basic information
Research Keyword
■Career
Career
- Apr. 2023 - Present
Teikyo Heisei University, Faculty of Humanities and Social Sciences, Professor - Apr. 2021 - Oct. 2023
Teikyo Heisei University, Faculty of Modern Life, Associate Professor - Apr. 2017 - Mar. 2021
Teikyo Heisei University, Faculty of Modern Life, Lecturer - Aug. 2007 - Mar. 2017
Jedat, Inc., 新技術開発室, 室長 - Nov. 2002 - Jul. 2007
NEC Electronics Corp., Fundamental Development Division, Manager - Apr. 1992 - Oct. 2002
NEC Corp., Semiconductor Division - Oct. 1998 - Sep. 1999
Kiel University, Heinz Dirks Laboratory, Visiting Scholar
Educational Background
Member History
- Oct. 2024 - Present
member of Technical Committee, International Conference on Control and Robotics - Jan. 2024 - Present
Program Co-chair, International Conference on Information and Computer Technologies - Jan. 2020 - Present
P2427 Analog Defect Coverage Working Group Member, IEEE - Sep. 2017 - Present
論文査読委員, Workshop on Synthesis And System Integration of Mixed Information technologies - Jan. 2023 - 2024
Technical Program Committee Member, International Conference on Information and Computer Technologies - Sep. 2000 - Aug. 2007
回路とシステムワークショップ実行委員, 電子情報通信学会 - Apr. 2004 - Mar. 2005
EDA技術専門委員会 Physical Design Methodology研究会 主査, JEITA
■Research activity information
Award
Paper
- Acceleration Methods for Finding Measurement Points for Testing Power TSVs in Stacked 3D-IC
Koutaro Hachiya
Proceedings of Tenth International Congress on Information and Communication Technology. ICICT 2024, Feb. 2025, [Reviewed]
Lead, Last, Corresponding - Evaluation of Vertical 2D Ranging Sensor in Detecting Steps in Front of Electric Wheelchairs Using Reinforcement Learning
Wataru Kishino; Koutaro Hachiya
6th International Conference on Control and Robotics (ICCR 2024), Dec. 2024, [Reviewed]
Last, Corresponding - Harnessing the power of child development records to detect early neurodevelopmental disorders using Bayesian analysis
Yuhei Hatakenaka; Koutaro Hachiya; Jakob Åsberg Johnels; Christopher Gillberg
Acta Paediatrica, 12 Sep. 2024, [Reviewed] - A Search Algorithm for Optimal Resistance Measurement Points in Testing Power TSV with Manufacturing Variation Cancellation
Yudai Kawakami; Koutaro Hachiya
The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies, Mar. 2024, [Reviewed]
Last, Corresponding - Measurement Point Selection Algorithms for Testing Power TSVs
Koutaro Hachiya
2023 IEEE International 3D Systems Integration Conference (3DIC), 10 May 2023, [Reviewed]
Lead, Last, Corresponding - Bayesian Neural Network Based Inductance Calculations of Wireless Power Transfer Systems
Kai Sato; Toshiki Kanamoto; Ryotaro Kudo; Koutaro Hachiya; Atsushi Kurokawa
IEICE ELECTRONICS EXPRESS, Feb. 2023 - A parabolic spiral coil transmitter with uniform magnetic field for smart devices.
Ryotaro Kudo; Koutaro Hachiya; Toshiki Kanamoto; Atsushi Kurokawa
IEICE Electron. Express, 2023 - A Bernoulli Spiral Coil Transmitter for Charging Various Small Electronic Devices
Ryotaro Kudo; Koutaro Hachiya; Toshiki Kanamoto; Atsushi Kurokawa
IEICE ELECTRONICS EXPRESS, Dec. 2022 - A Parabolic Spiral Coil Transmitter with Uniform Magnetic Field for Smart Devices
Ryotaro Kudo; Koutaro Hachiya; Toshiki Kanamoto; Atsushi Kurokawa
IEICE ELECTRONICS EXPRESS, Dec. 2022 - How Accurately Does the Information on Motor Development Collected During Health Checkups for Infants Predict the Diagnosis of Neurodevelopmental Disorders? – A Bayesian Network Model-Based Study
Yuhei Hatakenaka; Koutaro Hachiya; Shino Ikezoe; Jakob Åsberg Johnels; Christopher Gillberg
Neuropsychiatric Disease and Treatment, Oct. 2022, [Reviewed] - Receiver coil built into belt for heat dissipation of watch-type smart devices
Shinsuke Kashiwazaki; Koutaro Hachiya; Toshiki Kanamoto; Ryosuke Watanabe; Atsushi Kurokawa
IEICE Electronics Express, 10 Feb. 2022 - A Parabolic Spiral Coil Transmitter for Charging Multiple Receivers.
Ryotaro Kudo; Koutaro Hachiya; Toshiki Kanamoto; Atsushi Kurokawa
GCCE, 2022 - Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems.
Kai Sato; Toshiki Kanamoto; Ryotaro Kudo; Koutaro Hachiya; Atsushi Kurokawa
GCCE, 2022 - A bernoulli spiral coil transmitter for charging various small electronic devices.
Ryotaro Kudo; Koutaro Hachiya; Toshiki Kanamoto; Atsushi Kurokawa
IEICE Electronic Express, 2022 - Effective methods to promote heat dissipation of wrist wearables
Kodai Matsuhashi; Koutaro Hachiya; Toshiki Kanamoto; Shinsuke Kashiwazaki; Kyosuke Kusumi; Atsushi Kurokawa
IEICE Electronics Express, 2021 - Improving Defect Coverage of Testing Power TSVs by Increasing Sensitivity to TSV Resistance
Koutaro Hachiya
The 32nd Workshop on Circuits and Systems, Aug. 2020, [Reviewed]
Lead, Last, Corresponding - Detecting Resistive-Open Defects of TSVs in Power Distribution Network of 3D-IC
Koutaro Hachiya; Atshushi Kurokawa
2020 IEEE 24th Workshop on Signal and Power Integrity (SPI), 17 May 2020, [Reviewed]
Lead, Corresponding - ESSENCE‐Q obtained in routine Japanese public child health check‐ups may be a valuable tool in neurodevelopmental screening
Yuhei Hatakenaka; Masato Maeda; Hitoshi Ninomiya; Koutarou Hachiya; Elisabeth Fernell; Christopher Gillberg
Acta Paediatrica, Apr. 2020, [Reviewed] - Testing Through Silicon Vias in Power Distribution Network of 3D-IC with Manufacturing Variability Cancellation
Koutaro Hachiya; Atsushi Kurokawa
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar. 2020, [Reviewed]
Lead, Corresponding - Thermal placement on PCB of components including 3D ICs
Yuuta Satomi; Koutaro Hachiya; Toshiki Kanamoto; Ryosuke Watanabe; Atsushi Kurokawa
IEICE Electronics Express, Jan. 2020, [Reviewed] - Thermal Modeling and Simulation of a Smart Wrist-Worn Wearable Device
Kodai Matsuhashi; Koutaro Hachiya; Toshiki Kanamoto; Masasi Imai; Atsushi Kurokawa
The 22nd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2019), Oct. 2019, [Reviewed] - Comparison of Diagnostic Performance Metrics for Test Point Selection in Analog Circuits
Koutaro Hachiya; Atsushi Kurokawa
The 22nd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2019), Oct. 2019, [Reviewed]
Lead, Last, Corresponding - Variability Cancellation to Improve Diagnostic Performance of Testing Through Silicon Vias in Power Distribution Network of 3D-IC
Koutaro Hachiya; Atsushi Kurokawa
The IEEE International 3D Systems Integration Conference (3DIC 2019), Oct. 2019, [Reviewed]
Lead, Last, Corresponding - Diagnostic Performance Improvement for Open Defect Detection of Through Silicon Vias by Variability Cancellation
Koutaro Hachiya; Atsushi Kurokawa
Design Automation Symposium 2019, Aug. 2019, [Reviewed]
Lead, Last, Corresponding - Comparison of Diagnostic Performance Metrics for Test Point Selection in Analog Circuits
Koutaro Hachiya; Kiyoshi Teraoka; Atsushi Kurokawa
The 32nd Workshop on Circuits and Systems, Aug. 2019, [Reviewed]
Lead, Last, Corresponding - A Method to Improve Diagnostic Performance of Testing Through Silicon Vias in Power Distribution
Koutaro Hachiya; Atshushi Kurokawa
Taiwan and Japan Conference on Circuits and Systems, TJCAS, Aug. 2019, [Reviewed] - Thermal Placement Optimization of Packages with Stacked Chips
Yuuta Satomi; Koutaro Hachiya; Atsushi Kurokawa
Taiwan and Japan Conference on Circuits and Systems, TJCAS, Aug. 2019, [Reviewed] - Open Defect Detection of Through Silicon Vias for Structural Power Integrity Test of 3D-ICs
Koutaro Hachiya; Atsushi Kurokawa
23rd IEEE Workshop on Sigma and Power Integrity, Jun. 2019, [Reviewed]
Lead, Last, Corresponding - Neural Network-Based 3D IC Interconnect Capacitance Extraction
Ryosuke Kasai; Koutaro Hachiya; Toshiki Kanamoto; Masashi Imai; Atsushi Kurokawa
2019 2nd International Conference on Communication Engineering and Technology (ICCET 2019), Apr. 2019, [Reviewed] - ROC Curve and its Application to Fault Detection of Electro-Mechanical Systems
Koutaro Hachiya
Journal of Teikyo Heisei University, Mar. 2019 - Optimization of Full-Chip Power Distribution Networks in 3D ICs
Yuuta Satomi; Koutaro Hachiya; Toshiki Kanamoto; Atsushi Kurokawa
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM 2018), Dec. 2018, [Reviewed] - TSV Open Fault Detection by Measuring Resistance between Power Pins with the Best ROC Curve
KOUTARO HACHIYA; MIYUKI NAKANO; NANAMI HIMONO; ATSUSHI KUROKAWA; YUHEI HATAKENAKA
DAシンポジウム2018, Aug. 2018, [Reviewed] - Power Delivery Network Optimization of 3D ICs Using Multi-Objective Genetic Algorithm
Yuuta Satomi; Koutaro Hachiya; Masashi Imai; Toshiki Kanamoto; Kaoru Furumi; Atsushi Kurokawa
The 21th Workshop on Synthesis And System Integration of Mixed Information technologies, Mar. 2018, [Reviewed] - NBTI Reliability Analysis on Performance of Flip-Flops
渡邊眞之; 星誠; 宮崎浩; 小野信任; 蜂屋孝太郎; 黒川敦
Workshop on Circuits and Systems 25, Jul. 2012, [Reviewed] - Precise Expression of nm CMOS Variability with Variance/Covariance Statistics on Ids(Vgs)
Koutaro Hachiya; Hiroo Masuda; Atsushi Okamoto; Masatoshi Abe; Takeshi Mizoguchi; Goichi Yokomizo
The 17th Workshop on Synthesis And System Integration of Mixed Information technologies, Mar. 2012, [Reviewed]
Lead, Last, Corresponding - 微細CMOS回路ばらつき特性検証用QAデータベース
増田弘生; 阿部真利; 溝口健; 岡本淳; 田中琢爾; 蜂屋孝太郎; 横溝剛一
情報処理学会シンポジウム論文集, Aug. 2010, [Reviewed] - SPICE統計モデルパラメータの自動抽出とQuality Assurance
岡本淳; 田中琢爾; 阿部真利; 増田弘生; 蜂屋孝太郎; 横溝剛一
情報処理学会シンポジウム論文集, Aug. 2010, [Reviewed] - Impact of Self-Heating in Wire Interconnection on Timing
Toshiki Kanamoto; Takaaki Okumura; Katsuhiro Furukawa; Hiroshi Takafuji; Atsushi Kurokawa; Koutaro Hachiya; Tsuyoshi Sakata; Masakazu Tanaka; Hidenari Nakashima; Hiroo Masuda; Takashi Sato; Masanori Hashimoto
IEICE TRANSACTIONS ON ELECTRONICS, Mar. 2010, [Reviewed] - An Approach for Reducing Leakage Current Variation due to Manufacturing Variability
Tsuyoshi Sakata; Takaaki Okumura; Atsushi Kurokawa; Hidenari Nakashima; Hiroo Masuda; Takashi Sato; Masanori Hashimoto; Koutaro Hachiya; Katsuhiro Furukawa; Masakazu Tanaka; Hiroshi Takafuji; Toshiki Kanamoto
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Dec. 2009, [Reviewed] - Reduction approach of leak current variation due to process variation
佐方剛; 黒川敦; 奥村隆昌; 中島英斉; 増田弘生; 佐藤高史; 橋本昌宜; 蜂屋孝太郎; 古川且洋; 田中正和; 高藤浩資; 金本俊幾
IEICE (Karuizawa) Workshop on Circuits and Systems, Apr. 2009, [Reviewed] - Fast methods to estimate clock jitter due to power supply noise
Koutaro Hachiya; Takayuki Ohshima; Hidenari Nakashima; Masaaki Soda; Satoshi Goto
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Apr. 2007, [Reviewed] - LSI Design Method Considering Power Supply Noise
Koutaro Hachiya
Waseda University, Feb. 2007 - Impact of intrinsic parasitic extraction errors on timing and noise estimation
Toshiki Kanamoto; Shigekiyo Akutsu; Tamiyo Nakabayashi; Takahiro Ichinomiya; Koutaro Hachiya; Atsushi Kurokawa; Hiroshi Ishikawa; Sakae Muromoto; Hiroyuki Kbayashi; Masanori Hashimoto
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Dec. 2006, [Reviewed] - A method to estimate clock jitter due to power supply noise
蜂屋 孝太郎; 大嶋 孝幸; 中島 英斉
回路とシステム軽井沢ワークショップ論文集, Apr. 2006, [Reviewed] - A method to derive SSO design rule considering jitter constraint
K Hachiya; H Kobayashi; T Okumura; T Sato; H Oka
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Apr. 2006, [Reviewed] - On-chip thermal gradient analysis and temperature flattening for SoC design
T Sato; J Ichimiya; N Ono; K Hachiya; M Hashimoto
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Dec. 2005, [Reviewed] - Parallel iterative solvers for sparse linear systems in circuit simulation
A Basermann; U Jaekel; M Nordhausen; K Hachiya
FUTURE GENERATION COMPUTER SYSTEMS, Oct. 2005, [Reviewed] - ジッタ制約を考慮した IO 同時動作設計ルールの提案
蜂屋孝太郎; 小林宏行; 奥村; 佐藤高史
第 18 回 回路とシステム軽井沢ワークショップ論文集, Apr. 2005, [Reviewed] - Accuracy evaluation of interconnect capacitance extraction in consideration of delay calculation and signal integrity.
金本俊幾; 阿久津滋聖; 中林太美世; 一宮敬弘; 蜂屋孝太郎; 石川博; 室本栄; 小林宏行; 橋本昌宜
情報処理学会シンポジウム論文集, Jul. 2004, [Reviewed] - On-Chip Power Grid Modeling for I/O Jitter Analysis
蜂屋孝太郎; 岩井二郎; 小林進; 桝村好博
情報処理学会シンポジウム論文集, Jul. 2004, [Reviewed] - Parallel iterative solvers for sparse linear systems in circuit simulation
A Basermann; U Jaekel; K Hachiya
PROGRESS IN INDUSTRIAL MATHEMATICS AT ECMI 2002, 2004, [Reviewed] - Parallel Solution Techniques for Sparse Linear Systems in Circuit Simulation
Achim Basermann; Fabienne Cortial-Goutaudier; Uwe Jaekel; Koutaro Hachiya
Scientific Computing in Electrical Engineering. Mathematics in Industry, Springer, 2004, [Reviewed] - Evaluation and reduction of simulation error of chip-to-chip signal delay
T Ohshima; J Nonaka; Yamada, I; T Ohno; T Isozaki; K Hachiya
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2004, [Reviewed] - Practical Inductance-aware Design at 90nm/GHz Clock Frequency Technology Node
蜂屋孝太郎
情報処理学会シンポジウム論文集, Jul. 2003, [Reviewed] - VLSI電源解析システムPowerSpectiveの開発
岩井二郎; 町田顕; 水田千益; 南文裕; 黒川敦; 鹿毛哲郎; 増田弘生; 蜂屋孝太郎
情報処理学会シンポジウム論文集, Jul. 2003, [Reviewed] - Preconditioning parallel sparse iterative solvers for circuit simulation
Achim Basermann; Uwe Jaekel; Koutaro Hachiya
Proceedings of the 8th SIAM Proceedings on Applied Linear Algebra, Jul. 2003, [Reviewed] - Fast on-chip inductance extraction of VLSI including angled interconnects
A Kurokawa; K Hachiya; T Sato; K Tokumasu; H Masuda
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, Apr. 2003, [Reviewed] - Parallel Circuit Simulation on A General Purpose PC cluster.
桑田公彦; 蜂屋孝太郎; 斎藤敏幸; 中田登志之; 立川江介; 杉谷直樹
電子情報通信学会技術研究報告, Oct. 2002 - 斜め配線を含むVLSIの高速オンチップ・インダクタンス抽出
黒川敦; 蜂屋孝太郎; 佐藤高史; 徳升; 増田弘生
第 15 回 回路とシステム軽井沢ワークショップ論文集, Jul. 2002, [Reviewed] - Enhancement of parallelism for tearing-based circuit simulation
K Hachiya; T Saito; T Nakata; N Tanabe
PROCEEDINGS OF THE ASP-DAC '97 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1997, 1996, [Reviewed] - Research on ML Machine
Koutaro Hachiya
Tohoku University (Master Thesis), Mar. 1992
MISC
Lectures, oral presentations, etc.
- Analog Circuit Topology Generation Using Reasoning-Enhanced Large Language Models
Koutaro Hachiya
The 8th International Conference on Information and Computer Technologies, 15 Mar. 2025 - 大規模言語モデルへの回路図入力の試行
蜂屋孝太郎
私情協 教育イノベーション大会, 06 Sep. 2024 - 強化学習による電動車いす向け段差検出用センサの有効性評価
岸野 航; 蜂屋 孝太郎
第42回日本ロボット学会学術講演会, 06 Sep. 2024 - A Method for Deriving High-Risk Conditions from Bayesian Networks That Model Diagnostic Probabilities
Koutaro Hachiya; Yuhei Hatakenaka
The 8th International Conference on Information and Computer Technologies, 15 Mar. 2024 - 電源TSVのテストにおけるサンプリングによる欠陥カバレッジ推定
蜂屋 孝太郎; 川上 雄大
電子情報通信学会VLSI設計技術研究会, 01 Mar. 2024 - A Search Algorithm for Optimal Resistance Measurement Points in Testing Power TSV with Manufacturing Variation Cancellation
YUDAI KAWAKAMI; KOUTARO HACHIYA
DAシンポジウム, 31 Aug. 2023 - Comparison of Measurement Point Selection Algorithms for Testing Power TSVs
Kouta FUJIMOTO; Koutaro HACHIYA
ASP-DAC, 17 Jan. 2023 - Comparison of Measurement Point Selection Algorithms for Testing Power TSV in 3D-IC
KOUTA FUJIMOTO; KOUTARO HACHIYA
DAシンポジウム, 01 Sep. 2022 - Detecting Open Defects in Wires of On-Chip Power Grids by Measuring Resistances between Power Micro-Bumps
Koutaro Hachiya
International Test Conference, 04 Nov. 2020 - Thermal Placement on PCB of Components including Chip Stacking/2019 Taiwan and Japan Conference on Circuits and Systems
Yuuta Satomi; Koutaro Hachiya; Atsushi Kurokawa
2019 Taiwan and Japan Conference on Circuits and Systems, 19 Aug. 2019 - A Method to Improve Diagnostic Performance of Testing Through Silicon Vias in Power Distribution
Koutaro Hachiya; Atsushi Kurokawa
2019 Taiwan and Japan Conference on Circuits and Systems, 19 Aug. 2019 - 3D-ICの電源分配網におけるTSVオープン故障の検出方法の提案
中野美幸; 檜物菜々美; 蜂屋孝太郎
LSIとシステムのワークショップ2018, May 2018 - Resistance Driven Routing Methodology of Power Supply Network for Low Power and Multiple Voltage Design
Makoto Minami; Mathieu S. Molongo; Kenji Aoyama; Chen Lingfeng; Zhu Xiaoke; Kouji Ishihara; Nobuto Ono; Shunichi Kuwata; Kazuhiro Miura; Koutaro Hachiya
54th Design Automation Conference, Designer Track, Jun. 2017 - Quality Assurance Methodology of Compact MOSFET Models including Variability Effects
Hiroo Masuda; Koutaro Hachiya; Goichi Yokomizo
48th Design Automation Conference, Designer Track, Jun. 2011
Affiliated academic society
Research Themes
- AIを活用した小型電子機器の近傍界無線給電技術の開発
Grant-in-Aid for Scientific Research (B)
Hirosaki University
Apr. 2022 - Mar. 2026 - Practical study on rainfall water infiltration and slope failure mechanism in natural stratified slopes based on distributed sensor observations
Grant-in-Aid for Scientific Research (B)
Gunma University
Apr. 2021 - Mar. 2024 - 保健師の記録を用いた神経発達障害のリスク要因の研究-機械学習の手法によるモデル化
Grant-in-Aid for Scientific Research (C)
University of the Ryukyus
Apr. 2020 - Mar. 2023 - Research on Testing Power Distribution in Three Dimensional Integrated Circuits
Apr. 2019 - Mar. 2022 - アナログ、液晶パネル回路向け高速シミュレーション・システム
Apr. 2010 - Mar. 2012 - LSI回路の性能と歩留まりを高速に解析するシステムの開発
Apr. 2008 - Mar. 2010
Industrial Property Rights
- 特許第6022181号, 特開2013-205861, 特願2012-070677, 抵抗分布表示装置、プログラム及び記録媒体
宗形 恒夫; 蜂屋 孝太郎; 青山 憲治 - 特許3768375, 特開2001-290796, 特願2000-102163, Method and apparatus for matrix reordering and electronic circuit simulation
Koutaro Hachiya - 特許第3768375号, 特開2001-290796, 特願2000-102163, 計算装置および電子回路シミュレーション装置
蜂屋 孝太郎 - 特許第3391262号, 特開平11-328155, 特願平10-127738, Simulation device and its method for simulating operation of large-scale electronic circuit by parallel processing
蜂屋 孝太郎 - 特許第2959525号, 特開平10-334129, 特願平9-143955, データ処理装置および方法、情報記憶媒体
蜂屋 孝太郎 - 特許第2830838号, 特開平9-319784, 特願平8-136671, Circuit partitioning apparatus for executing parallel circuit simulation and method therefor
蜂屋 孝太郎